Dongsheng Zuo

Dongsheng Zuo


Ph.D. Candidate

Microelectronics Thrust

Hong Kong University of Science and Technology (Guangzhou)

dzuo721[at]connect.hkust-gz.edu.cn

dzuo[at]connect.ust.hk

[CV] [Google Scholar]
About
I am a 2nd year Ph.D. student at the Microelectronics Thrust of The Hong Kong University of Science and Technology (Guangzhou) , advised by Prof. Yuzhe Ma. I received my M.S. degree from the Hong Kong University of Science and Technology in 2022, and B.E. degrees from Harbin Institute of Technology in 2021. My research interests are on the cross-disciplinary study of electronic design automation (EDA) and machine learning, including machine learning-aided VLSI design, and datapath circuit design optimization.

News
  • 09/2024: Two papers accepted by ASPDAC 2025.
  • 06/2024: One paper accepted by ICCAD 2024.
  • 02/2023: One paper accepted by DAC 2023.
  • 09/2022: Start pursuing the Ph.D. degree in HKUST(GZ). Good luck?
    • Education
    Ph.D. in Microelectronics
    The Hong Kong University of Science and Technology (Guangzhou)
    Sep. 2022 - Present
    M.S. in Electronic Engineering
    The Hong Kong University of Science and Technology
    Sep. 2021 - Jul. 2022
    B.E. in Microelectronics (Major)
    B.E. in Data Science and Big Data Technology (Minor)
    Harbin Institute of Technology
    Sep. 2017 - Jul. 2021
    Experience
    Research Intern
    Huawei Noah’s Ark Lab
    Jun. 2023 - Dec. 2023
    Engineering Intern
    NVIDIA Corporation
    Mar. 2022 - Jul. 2022
    Engineering Intern
    Cambricon Technologies Co., Ltd.
    Jun. 2021 - Aug. 2021
    Engineering Intern
    Tensorchip Technologies Co., Ltd.
    Jan. 2021 - Apr. 2021
    Research Assistant
    University of Florida
    Jun. 2020 - Aug. 2020
    Publications
    * denotes equal contribution.
    [C7] A Holistic FPGA Architecture Exploration Framework for Deep Learning Acceleration
  • Jiadong Zhu*, Dongsheng Zuo*, Yuzhe Ma
  • Asia and South Pacific Design Automation Conference (ASP-DAC), Tokyo, Japan, Jan. 2025.
    • [C6] SMART-GPO: Gate-Level Sensitivity Measurement with Accurate Estimation for Glitch Power Optimization
  • Yikang Ouyang, Yuchao Wu, Dongsheng Zuo, Subhendu Roy, Tinghuan Chen, Zhiyao Xie, and Yuzhe Ma
  • Asia and South Pacific Design Automation Conference (ASP-DAC), Tokyo, Japan, Jan. 2025.
    • [C5] UFO-MAC: A Unified Framework for Optimization of High-Performance Multipliers and Multiply-Accumulators
  • Dongsheng Zuo, Jiadong Zhu, Chenglin Li, Yuzhe Ma
  • ACM/IEEE International Conference on Computer-Aided Design (ICCAD), New York, Oct. 2024.
    • [C4] A Hierarchical Adaptive Multi-Task Reinforcement Learning Framework for Multiplier Circuit Design
  • Zhihai Wang, Jie Wang, Dongsheng Zuo, Ji Yunjie, Xilin Xia, Yuzhe Ma, Jianye Hao, Mingxuan Yuan, Yongdong Zhang, Feng Wu
  • International Conference on Machine Learning (ICML), Vienna, Austria, Jul. 2024.
    • [C3] E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis
  • Chen Chen, Guangyu Hu, Dongsheng Zuo, Cunxi Yu, Yuzhe Ma, Hongce Zhang
  • ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 2024.
    • [C2] ASAP: Accurate Synthesis Analysis and Prediction with Multi-task Learning
  • Best Paper Award
  • Yikang Ouyang, Sicheng Li, Dongsheng Zuo, Hanwei Fan, Yuzhe Ma
  • ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), Utah, Sep. 2023.
    • [C1] RL-MUL: Multiplier Design Optimization with Deep Reinforcement Learning
  • Dongsheng Zuo, Yikang Ouyang, Yuzhe Ma
  • ACM/IEEE Design Automation Conference (DAC), San Francisco, Jul. 2023.